OVER-VOLTAGE PROTECTION OF GALLIUM NITRIDE SEMICONDUCTOR DEVICES
    6.
    发明申请
    OVER-VOLTAGE PROTECTION OF GALLIUM NITRIDE SEMICONDUCTOR DEVICES 有权
    氮化镓半导体器件的过电压保护

    公开(公告)号:US20150001551A1

    公开(公告)日:2015-01-01

    申请号:US13931363

    申请日:2013-06-28

    Abstract: A monolithically integrated semiconductor assembly is presented. The semiconductor assembly includes a substrate including silicon carbide (SiC), and gallium nitride (GaN) semiconductor device is fabricated on the substrate. The semiconductor assembly further includes at least one transient voltage suppressor (TVS) structure fabricated in or on the substrate, wherein the TVS structure is in electrical contact with the GaN semiconductor device. The TVS structure is configured to operate in a punch-through mode, an avalanche mode, or combinations thereof, when an applied voltage across the GaN semiconductor device is greater than a threshold voltage. Methods of making a monolithically integrated semiconductor assembly are also presented.

    Abstract translation: 提出了一种单片集成半导体组件。 半导体组件包括包含碳化硅(SiC)的衬底,并且在衬底上制造氮化镓(GaN)半导体器件。 半导体组件还包括在衬底中或衬底上制造的至少一个瞬态电压抑制器(TVS)结构,其中TVS结构与GaN半导体器件电接触。 当跨越GaN半导体器件的施加电压大于阈值电压时,TVS结构被配置为以穿通模式,雪崩模式或其组合工作。 还提出了制造单片集成半导体组件的方法。

    Semiconductor assembly and method of manufacture

    公开(公告)号:US09997507B2

    公开(公告)日:2018-06-12

    申请号:US13950736

    申请日:2013-07-25

    CPC classification number: H01L27/0248 H01L2924/0002

    Abstract: A monolithically integrated semiconductor assembly is presented. The semiconductor assembly includes a substrate including silicon (Si), and gallium nitride (GaN) semiconductor device is fabricated on the substrate. The semiconductor assembly further includes at least one transient voltage suppressor (TVS) structure fabricated in or on the substrate, wherein the TVS structure is in electrical contact with the GaN semiconductor device. The TVS structure is configured to operate in a punch-through mode, an avalanche mode, or combinations thereof, when an applied voltage across the GaN semiconductor device is greater than a threshold voltage. Methods of making a monolithically integrated semiconductor assembly are also presented.

    STRUCTURE AND METHOD FOR TRANSIENT VOLTAGE SUPPRESSION DEVICES WITH A TWO-REGION BASE
    10.
    发明申请
    STRUCTURE AND METHOD FOR TRANSIENT VOLTAGE SUPPRESSION DEVICES WITH A TWO-REGION BASE 有权
    具有两个区域的瞬态电压抑制装置的结构和方法

    公开(公告)号:US20160099318A1

    公开(公告)日:2016-04-07

    申请号:US14505975

    申请日:2014-10-03

    Abstract: A transient voltage suppression (TVS) device and a method of forming the device are provided. The TVS device includes a first layer of wide band-gap semiconductor material formed of a first conductivity type material, a second layer of wide band-gap semiconductor material formed of a second conductivity type material over at least a portion of the first layer, the second layer including a first concentration of dopant. The TVS device further including a third layer of wide band-gap semiconductor material formed of the second conductivity type material over at least a portion of the second layer, the third layer including a second concentration of dopant, the second concentration of dopant being different than the first concentration of dopant. The TVS device further including a fourth layer of wide band-gap semiconductor material formed of the first conductivity type material over at least a portion of the third layer.

    Abstract translation: 提供瞬态电压抑制(TVS)装置和形成装置的方法。 TVS器件包括由第一导电类型材料形成的第一层宽带隙半导体材料,在第一层的至少一部分上由第二导电类型材料形成的第二层宽带隙半导体材料, 第二层包括掺杂剂的第一浓度。 TVS器件还包括在第二层的至少一部分上由第二导电类型材料形成的第三层宽带隙半导体材料,第三层包括第二浓度的掺杂剂,第二掺杂剂浓度不同于 掺杂剂的第一个浓度。 TVS器件还包括在第三层的至少一部分上由第一导电类型材料形成的第四层宽带隙半导体材料。

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