发明申请
- 专利标题: POWER ON RESET GENERATION CIRCUITS IN INTEGRATED CIRCUITS
- 专利标题(中): 集成电路中的电源复位生成电路
-
申请号: US13567611申请日: 2012-08-06
-
公开(公告)号: US20140035634A1公开(公告)日: 2014-02-06
- 发明人: Aatmesh Shrivastava , Rajesh Yadav
- 申请人: Aatmesh Shrivastava , Rajesh Yadav
- 申请人地址: US TX Dallas
- 专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址: US TX Dallas
- 主分类号: H03L7/00
- IPC分类号: H03L7/00
摘要:
Integrated Circuits (ICs) comprising circuits configured to generate a power on reset (POR) pulse are disclosed. An IC comprises a power supply sense circuit configured to generate a sense signal in response to a transition of a power supply signal from a first level to a second level, and a pulse generation circuit coupled with the power supply sense circuit. The pulse generation circuit is configured to generate a power on reset (POR) pulse of a threshold duration based on the sense signal. The IC further includes a reset generation circuit coupled with the pulse generation circuit to receive the POR pulse. The reset generation circuit is configured to generate a reset pulse based on the POR signal and of at least one control signal, where the reset pulse is configured to be utilized to perform a reset of one or more elements of the integrated circuit.
公开/授权文献
- US08680901B2 Power on reset generation circuits in integrated circuits 公开/授权日:2014-03-25
信息查询