Invention Application
- Patent Title: METHODS OF FORMING A STACK OF ELECTRODES AND THREE-DIMENSIONAL SEMICONDUCTOR DEVICES FABRICATED THEREBY
- Patent Title (中): 形成电极堆叠的方法和三维半导体器件的制造方法
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Application No.: US13973627Application Date: 2013-08-22
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Publication No.: US20140054787A1Publication Date: 2014-02-27
- Inventor: Dongseog EUN , Young-Ho LEE , Joonhee LEE , Seok-won LEE , Yoocheol SHIN
- Applicant: Dongseog EUN , Young-Ho LEE , Joonhee LEE , Seok-won LEE , Yoocheol SHIN
- Priority: KR10-2012-0091920 20120822
- Main IPC: H01L23/498
- IPC: H01L23/498

Abstract:
Provided are methods of forming a stack of electrodes and three-dimensional semiconductor devices fabricated thereby. The device may include electrodes sequentially stacked on a substrate to constitute an electrode structure. each of the electrodes may include a connection portion protruding horizontally and outward from a sidewall of one of the electrodes located thereon and an aligned portion having a sidewall coplanar with that of one of the electrodes located thereon or thereunder. Here, at least two of the electrodes provided vertically adjacent to each other may be provided in such a way that the aligned portions thereof have sidewalls that are substantially aligned to be coplanar with each other.
Public/Granted literature
- US09230904B2 Methods of forming a stack of electrodes and three-dimensional semiconductor devices fabricated thereby Public/Granted day:2016-01-05
Information query
IPC分类: