Invention Application
- Patent Title: MULTIPLE CLOCK DOMAIN CYCLE SKIPPING UTILIZING OPTIMAL MASKS TO MINIMIZE VOLTAGE NOISE
- Patent Title (中): 多个时钟域周期使用最佳掩码来最小化电压噪声
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Application No.: US13631296Application Date: 2012-09-28
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Publication No.: US20140095909A1Publication Date: 2014-04-03
- Inventor: Sebastian Turullols
- Applicant: ORACLE INTERNATIONAL CORPORATION
- Applicant Address: US CA Redwood City
- Assignee: ORACLE INTERNATIONAL CORPORATION
- Current Assignee: ORACLE INTERNATIONAL CORPORATION
- Current Assignee Address: US CA Redwood City
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/06

Abstract:
Implementations of the present disclosure involve an apparatus and/or method for providing one or more clock signals that include a skipped clock cycle to a portion of a computing system. The skipped cycle clock signals may be changed by the computing system during operation of the system by altering masks applied to a global clock signal. However, the flexibility to alter various skipped cycle clock signals may introduce noise or signal disruptions within the system. Thus, the present disclosure may also involve an apparatus and/or method for managing the altering of the clock cycle skipping masks to manage the voltage noise introduced into the system by the adjustment of the operating frequency of the portions of the system. In one embodiment, the method includes prioritizing or otherwise ordering the bits of the masks applied to the global clock signal to attempt to prevent similar bits from being altered simultaneously.
Public/Granted literature
- US08949651B2 Multiple clock domain cycle skipping utilizing optimal mask to minimize voltage noise Public/Granted day:2015-02-03
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