发明申请
US20140103542A1 SEMICONDUCTOR PACKAGE WITH BONDING WIRES OF REDUCED LOOP INDUCTANCE
有权
具有减少环路电感的连接线的半导体封装
- 专利标题： SEMICONDUCTOR PACKAGE WITH BONDING WIRES OF REDUCED LOOP INDUCTANCE
- 专利标题（中）： 具有减少环路电感的连接线的半导体封装
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申请号： US14109618申请日： 2013-12-17
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公开(公告)号： US20140103542A1公开(公告)日： 2014-04-17
- 发明人: Mitsuaki KATAGIRI , Ken Iwakura , Yutaka Uematsu
- 申请人： Mitsuaki KATAGIRI , Ken Iwakura , Yutaka Uematsu
- 专利权人： Elpida Memory, Inc.
- 当前专利权人： Elpida Memory, Inc.
- 优先权： JP2010-252913 20101111
- 主分类号： H01L23/498
- IPC分类号： H01L23/498
摘要：
A semiconductor package includes a semiconductor device including a plurality of signal pads and a plurality of auxiliary pads which are alternatively arranged in a predetermined direction, and a package board including a plurality of signal bond fingers, a plurality of first power supply voltage bond fingers, and a plurality of second power supply voltage bond fingers. The signal pads are connected respectively to the signal bond fingers by first wires. The first power supply voltage bond fingers and the second power supply voltage bond fingers are connected respectively to the auxiliary pads by second wires. The first wires are disposed between those of the second wires which are connected to the first power supply voltage bond fingers and those of the second wires which are connected to the second power supply voltage bond fingers.
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