Invention Application
- Patent Title: METHOD OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND THREE-DIMENSIONAL SEMICONDUCTOR DEVICE FABRICATED USING THE SAME
- Patent Title (中): 制造三维半导体器件的方法和使用其制造的三维半导体器件
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Application No.: US13949600Application Date: 2013-07-24
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Publication No.: US20140106569A1Publication Date: 2014-04-17
- Inventor: Jung-Ik OH , Daehyun JANG , Ha-Na KIM , Seongsoo LEE
- Applicant: Jung-Ik OH , Daehyun JANG , Ha-Na KIM , Seongsoo LEE
- Priority: KR10-2012-0114864 20121016
- Main IPC: H01L21/308
- IPC: H01L21/308

Abstract:
According to example embodiments of inventive concepts, a method of fabricating a 3D semiconductor device may include: forming a stack structure including a plurality of horizontal layers sequentially stacked on a substrate including a cell array region and a contact region; forming a first mask pattern covering the cell array region and defining openings extending in one direction over the contact region; performing a first etching process with a first etch-depth using the first mask pattern as an etch mask on the stack structure; forming a second mask pattern covering the cell array region and exposing a part of the contact region; and performing a second etching process with a second etch-depth using the second mask pattern as an etch mask structure on the stack structure. The second etch-depth may be greater than the first etch-depth.
Public/Granted literature
Information query
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