Invention Application
- Patent Title: PACKAGE SUBSTRATE AND METHOD OF FORMING THE SAME
- Patent Title (中): 封装基板及其形成方法
-
Application No.: US13966045Application Date: 2013-08-13
-
Publication No.: US20140117557A1Publication Date: 2014-05-01
- Inventor: Yu-Hua CHEN , Wei-Chung LO , Dyi-Chung HU , Chang-Hong HSIEH
- Applicant: UNIMICRON TECHNOLOGY CORPORATION , INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Applicant Address: TW Taoyuan TW Hsinchu
- Assignee: UNIMICRON TECHNOLOGY CORPORATION,INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Current Assignee: UNIMICRON TECHNOLOGY CORPORATION,INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
- Current Assignee Address: TW Taoyuan TW Hsinchu
- Priority: TW101139429 20121025
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/56

Abstract:
A package substrate and a method for forming the package substrate are disclosed. The package substrate includes an interposer having a plurality of conductive through vias and a first insulating layer formed on the sidewalls of the conductive through vias, a second insulating layer formed on one side of the interposer, and a plurality of conductive vias formed in the second insulating layer and electrically connected to the conductive through vias. By increasing the thickness of the first insulating layer, the face diameter of the conductive through vias can be reduced, and the layout density of the conductive through vias in the interposer can thus be increased.
Information query
IPC分类: