公开(公告)号：US12101881B2

公开(公告)日：2024-09-24

申请号：US18455782

申请日：2023-08-25

Applicant: Unimicron Technology Corporation

Inventor： Ching-Ho Hsieh ,  Ming-Hsing Wu ,  Kuei-Sheng Wu

IPC: H05K1/14 ,  H01R12/79 ,  H05K1/02

CPC classification number: H05K1/144 ,  H01R12/79 ,  H05K1/028 ,  H05K2201/042 ,  H05K2201/09063 ,  H05K2201/10189 ,  H05K2201/2018

Abstract: A circuit board assembly is provided and includes a first circuit board, a second circuit board and a first connecting module. The first connecting module includes a first connecting wire, a first connector and a second connector. The first circuit board includes a first processor, and the second circuit board includes a second processor. One end of the first connector is connected to one end of the first connecting wire, and the other end of the first connector is connected to the first circuit board. One end of the second connector is connected to the other end of the first connecting wire, and the other end of the second connector is connected to the second circuit board. The first connector is adjacent to the first processor, and the second connector is adjacent to the second processor.

公开(公告)号：US11585648B2

公开(公告)日：2023-02-21

申请号：US17209839

申请日：2021-03-23

Applicant: Unimicron Technology Corporation

Inventor： Cheng-Jui Chang ,  Hung-Lin Chang

IPC: G01B7/06 ,  H05K1/11 ,  H05K1/02

Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.

公开(公告)号：US11497115B2

公开(公告)日：2022-11-08

申请号：US16944178

申请日：2020-07-31

Applicant: UNIMICRON TECHNOLOGY CORPORATION

Inventor： Yi Lin ,  Hsiao-Han Huang ,  Yu-Hsin Pan

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H05K3/10

Abstract: Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.

公开(公告)号：US20210375737A1

公开(公告)日：2021-12-02

申请号：US16944179

申请日：2020-07-31

Applicant: UNIMICRON TECHNOLOGY CORPORATION

Inventor： CHIEN-CHEN LIN

IPC: H01L23/498 ,  H01L21/48

Abstract: An embedded component substrate structure and a method for manufacturing the same, with a carrier structure being formed with a groove on a top, and a chip structure with a plurality of conductors disposed in the groove. Dielectric layers are disposed on a top and a bottom of the carrier structure, and two opposite ends of multiple circuits in the carrier structure are exposed to the dielectric layers. Circuit build-up structures are disposed on the dielectric layers, and electrically connect to the circuits of the carrier structure.

公开(公告)号：US10076039B2

公开(公告)日：2018-09-11

申请号：US14539312

申请日：2014-11-12

Applicant: Unimicron Technology Corporation

Inventor： Tzyy-Jang Tseng ,  Chung-W. Ho

IPC: H05K3/00 ,  H05K3/46 ,  H05K3/40 ,  H01L23/498 ,  H01L23/00

CPC classification number: H05K3/0091 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K3/4007 ,  H05K3/4647 ,  H05K3/4682 ,  H05K3/4685 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A method of fabricating a packaging substrate includes following steps: providing a carrier board having two opposite surfaces, forming on each of the surfaces a plurality of first metal bumps; covering the carrier board and the first metal bumps with a first dielectric layer that has a plurality of first intaglios which exposes a top surface and side surface of the first metal bumps; forming a conductive seedlayer on the first dielectric layer and the first metal bumps; forming a metal layer on the conductive seedlayer; removing a portion of the metal layer and the conductive seedlayer that is higher than the top surface of the first dielectric layer, and forming a first circuit layer in the first intaglios; forming a built-up structure on the first circuit layer and the first dielectric layer, forming a pair of upper and lower entire packaging substrates.

公开(公告)号：US09460992B2

公开(公告)日：2016-10-04

申请号：US14641901

申请日：2015-03-09

Applicant: Unimicron Technology Corporation

Inventor： Tzyy-Jang Tseng ,  Dyi-Chung Hu ,  Ying-Chih Chan

IPC: H01L23/498 ,  H01L23/48 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H05K1/11 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/115 ,  H05K2201/10378 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/014

Abstract: A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.

Abstract translation: 提供了一种贯穿孔插入器，包括板体，形成在板体中的导电凝胶，以及布置在板体上的电路再分布结构。 导电性凝胶具有从板体的表面突出的一端，与其他结构（例如，封装基板或电路结构）接触的导电性凝胶的突出部的面积增加，从而加强 导电凝胶和插层的可靠性。

公开(公告)号：US09337136B2

公开(公告)日：2016-05-10

申请号：US14641887

申请日：2015-03-09

Applicant: Unimicron Technology Corporation

Inventor： Tzyy-Jang Tseng ,  Dyi-Chung Hu ,  Ying-Chih Chan

IPC: H01L21/4763 ,  H01L23/498 ,  H01L23/48 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H05K1/11 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/115 ,  H05K2201/10378 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/014

Abstract: A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.

Abstract translation: 提供了一种贯穿孔插入器，包括板体，形成在板体中的导电凝胶，以及布置在板体上的电路再分布结构。 导电性凝胶具有从板体的表面突出的一端，与其他结构（例如，封装基板或电路结构）接触的导电性凝胶的突出部的面积增大， 导电凝胶和插层的可靠性。

公开(公告)号：US09224683B2

公开(公告)日：2015-12-29

申请号：US14641918

申请日：2015-03-09

Applicant: Unimicron Technology Corporation

Inventor： Tzyy-Jang Tseng ,  Dyi-Chung Hu ,  Ying-Chih Chan

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/48 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H05K1/11 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/115 ,  H05K2201/10378 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/014

Abstract: A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.

Abstract translation: 提供了一种贯穿孔插入器，包括板体，形成在板体中的导电凝胶，以及布置在板体上的电路再分布结构。 导电性凝胶具有从板体的表面突出的一端，与其他结构（例如，封装基板或电路结构）接触的导电性凝胶的突出部的面积增加，从而加强 导电凝胶和插层的可靠性。

公开(公告)号：US20140084463A1

公开(公告)日：2014-03-27

申请号：US14095144

申请日：2013-12-03

Applicant: Unimicron Technology Corporation

Inventor： Tzyy-Jang Tseng ,  Dyi-Chung Hu ,  Yu-Shan Hu

IPC: H01L21/56 ,  H01L21/768 ,  H01L23/498

CPC classification number: H01L21/56 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76885 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/00015 ,  H01L2924/00

Abstract: A semiconductor package structure is provided, including: a semiconductor chip having electrode pads disposed thereon and metal bumps disposed on the electrode pads; an encapsulant encapsulating the semiconductor chip; a dielectric layer formed on the encapsulant and having a plurality of patterned intaglios formed therein for exposing the metal bumps; a wiring layer formed in the patterned intaglios of the dielectric layer and electrically connected to the metal bumps; and a metal foil having a plurality of metal posts disposed on a surface thereof such that the metal foil is disposed on the encapsulant with the metal posts penetrating the encapsulant so as to extend to the inactive surface of the semiconductor chip. Compared with the prior art, the present invention reduces the overall thickness of the package structure, increases the electrical transmission efficiency and improves the heat dissipating effect.

Abstract translation: 提供一种半导体封装结构，包括：具有设置在其上的电极焊盘的半导体芯片和设置在电极焊盘上的金属凸块; 封装半导体芯片的密封剂; 介电层，其形成在所述密封剂上并且具有形成在其中的多个图案化的凹凸，用于暴露所述金属凸块; 形成在电介质层的图案化凹凸中并与金属凸块电连接的布线层; 以及具有设置在其表面上的多个金属柱的金属箔，使得金属箔设置在密封剂上，金属柱穿透密封剂，以延伸到半导体芯片的非活性表面。 与现有技术相比，本发明减小了封装结构的整体厚度，提高了电传输效率并提高了散热效果。

公开(公告)号：US20140084413A1

公开(公告)日：2014-03-27

申请号：US13965842

申请日：2013-08-13

Applicant: UNIMICRON TECHNOLOGY CORPORATION ,  INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Yu-Hua CHEN ,  Wei-Chung LO ,  Dyi-Chung HU ,  Chang-Hong HSIEH

IPC: H01L23/522

CPC classification number: H01L23/5226 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L25/04 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a top surface and a bottom surface opposing the top surface; an insulating protective layer formed on the top surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and passive components provided on or embedded in the interposer. By integrating the passive components into the package substrate, when a chip is provided on the interposer, the conductive path between the chip and the passive components can be shortened, and the pins of the chip have a stable voltage. Therefore, the overall electrical performance is enhanced.

Abstract translation: 提供封装基板和制造封装基板的方法。 封装衬底包括具有顶表面和与顶表面相对的底表面的衬底; 形成在所述基板的上表面上的绝缘保护层; 嵌入并从绝缘保护层暴露的插入体; 以及提供在或插入到插入器中的被动元件。 通过将无源部件集成到封装基板中，当在插入件上设置芯片时，可以缩短芯片和无源部件之间的导电路径，并且芯片的引脚具有稳定的电压。 因此，整体电气性能得到提高。