Invention Application
- Patent Title: ELECTRICAL DEVICE PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME
- Patent Title (中): 电气设备包装结构及其制造方法
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Application No.: US13726230Application Date: 2012-12-24
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Publication No.: US20140174804A1Publication Date: 2014-06-26
- Inventor: Tzyy-Jang Tseng , Shu-Sheng Chiang , Tsung-Yuan Chen , Shih-Lian Cheng
- Applicant: UNIMICRON TECHNOLOGY CORP.
- Applicant Address: TW Taoyuan
- Assignee: UNIMICRON TECHNOLOGY CORP.
- Current Assignee: UNIMICRON TECHNOLOGY CORP.
- Current Assignee Address: TW Taoyuan
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H05K3/30

Abstract:
A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed. Moreover, the electrical device package structure is also provided.
Public/Granted literature
- US09161454B2 Electrical device package structure and method of fabricating the same Public/Granted day:2015-10-13
Information query