Invention Application
- Patent Title: METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
- Patent Title (中): 制造半导体器件和半导体器件的方法
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Application No.: US14138164Application Date: 2013-12-23
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Publication No.: US20140183759A1Publication Date: 2014-07-03
- Inventor: Jumpei Konno , Takafumi Nishita , Nobuhiro Kinoshita , Kazunori Hasegawa , Michiaki Sugiyama
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Priority: JP2012-286078 20121227
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/49

Abstract:
Reliability of a semiconductor device is improved. Each of a plurality of terminals formed on a chip mounting surface included in a wiring substrate has a shape in which a narrow width portion is arranged between adjacent wide width portions in plan view. Moreover, a center of a tip end surface of each of a plurality of protruding electrodes formed on a semiconductor chip mounted on the wiring substrate is arranged at a position where it overlaps the narrow width portion in plan view, and the plurality of terminals and the plurality of protruding electrodes are electrically connected to each other via a solder member.
Public/Granted literature
- US09455240B2 Method of manufacturing semiconductor device and semiconductor device Public/Granted day:2016-09-27
Information query
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