发明申请
- 专利标题: PROGRAMMING A SPLIT GATE BIT CELL
- 专利标题(中): 编程分离门控单元
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申请号: US13751548申请日: 2013-01-28
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公开(公告)号: US20140211559A1公开(公告)日: 2014-07-31
- 发明人: Cheong M. Hong , Ronald J. Syzdek , Brian A. Winstead
- 申请人: Cheong M. Hong , Ronald J. Syzdek , Brian A. Winstead
- 主分类号: G11C11/40
- IPC分类号: G11C11/40
摘要:
A method of programming a split gate memory applies voltages differently to the terminals of the selected cells and the deselected cells. For cells being programming by being coupled to a selected row and a selected column, coupling the control gate to a first voltage, coupling the select gate to a second voltage, programming is achieved by coupling the drain terminal to a current sink that causes the split gate memory cell to be conductive, and coupling the source terminal to a third voltage. For cells not being programmed by not being coupled to a selected row, non-programming is maintained by coupling the control gate to the first voltage, coupling the select gate to a fourth voltage which is greater than a voltage applied to the select gate during a read in which the split gate memory cells are deselected but sufficiently low to prevent programming.
公开/授权文献
- US08885403B2 Programming a split gate bit cell 公开/授权日:2014-11-11