Invention Application
- Patent Title: Using Reduced Instruction Set Cores
- Patent Title (中): 使用精简指令集内核
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Application No.: US13992856Application Date: 2011-12-30
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Publication No.: US20140258685A1Publication Date: 2014-09-11
- Inventor: Srihari Makineni , Steven R. King , Alexander Redkin , Joshua B. Fryman , Ravishankar Iyer , Pavel S. Smirnov , Dmitry Gusev , Dmitri Pavlov
- Applicant: Srihari Makineni , Steven R. King , Alexander Redkin , Joshua B. Fryman , Ravishankar Iyer , Pavel S. Smirnov , Dmitry Gusev , Dmitri Pavlov
- International Application: PCT/US11/68015 WO 20111230
- Main IPC: G06F9/30
- IPC: G06F9/30

Abstract:
A processor may be built with cores that only execute some partial set of the instructions needed to be fully backwards compliant. Thus, in some embodiments power consumption may be reduced by providing partial cores that only execute certain instructions and not other instructions. The instructions not supported may be handled in other, more energy efficient ways, so that, the overall processor, including the partial core, may be fully backwards compliant.
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