Invention Application
US20140300410A1 CASCODED SEMICONDUCTOR DEVICES 有权
测试半导体器件

CASCODED SEMICONDUCTOR DEVICES
Abstract:
The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit.
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