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公开(公告)号:US20140300410A1
公开(公告)日:2014-10-09
申请号:US14215243
申请日:2014-03-17
Applicant: NXP B.V.
Inventor: Henricus Cornelis Johannes BÜTHKER , Matthias ROSE
CPC classification number: G05F3/247 , H01L23/50 , H01L2924/0002 , H03K17/08128 , H03K17/567 , H03K2017/307 , H03K2017/6875 , H01L2924/00
Abstract: The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit.
Abstract translation: 本发明提供一种具有耗尽型晶体管和开关器件的共源共栅晶体管电路。 栅极偏置电路连接在耗尽型晶体管的栅极和低电源线之间。 栅极偏置电路适于补偿开关器件的二极管功能的正向电压。 耗尽型晶体管和栅极偏置电路形成为集成电路的一部分。
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公开(公告)号:US20140027785A1
公开(公告)日:2014-01-30
申请号:US13937451
申请日:2013-07-09
Applicant: NXP B.V.
Inventor: Matthias ROSE
IPC: H01L27/06
CPC classification number: H01L27/06 , H03K17/08122 , H03K17/102 , H03K17/567 , H03K2017/6875
Abstract: A cascoded power semiconductor circuit is provided for power switches based on depletion-mode (normally on) devices. The control circuit makes use of a bootstrap arrangement that allows an active control of both power switches of a cascode circuit using a single gate driver.
Abstract translation: 基于耗尽模式(通常在设备)上的功率开关提供级联功率半导体电路。 控制电路使用自举装置,其允许使用单个栅极驱动器主动控制共源共栅电路的两个功率开关。
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公开(公告)号:US20180138812A1
公开(公告)日:2018-05-17
申请号:US15724867
申请日:2017-10-04
Applicant: NXP B.V.
Inventor: Matthias ROSE , Hendrik Johannes BERGVELD , Olivier TRESCASES , David King Wai LI
CPC classification number: H02M3/157 , H02M1/08 , H02M3/156 , H02M3/158 , H02M2001/0009
Abstract: A predictive controller for an inductive DC-DC converter comprising a switchable inductor is described. The predictive controller includes a DC-DC controller configured to generate a plurality of switching phases to control the inductor current in the switchable inductor, the duration of the switching phases being determined from at least one of a reference inductor current value and a reference output voltage value. The predictive controller includes a supervisory controller coupled to the DC-DC controller and configured to set a reference inductor current value dependent on an expected change in load current and/or voltage of a load configured to be connected to the load terminal. The expected change in load current and/or voltage is determined from a predetermined load profile.
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公开(公告)号:US20140145208A1
公开(公告)日:2014-05-29
申请号:US14056648
申请日:2013-10-17
Applicant: NXP B.V.
Inventor: Matthias ROSE , Jan SONSKY , Philip RUTTER
IPC: H01L27/088 , H01L27/08
CPC classification number: H01L27/088 , H01L27/0814 , H03K17/567 , H03K17/6871 , H03K17/6874 , H03K17/74 , H03K2017/6875
Abstract: A cascoded power semiconductor circuit has a clamp circuit between the source and gate of a gallium nitride or silicon carbide FET to provide avalanche protection for the cascode MOSFET transistor.
Abstract translation: 级联功率半导体电路在氮化镓或碳化硅FET的源极和栅极之间具有钳位电路,以提供共源共栅MOSFET晶体管的雪崩保护。
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