发明申请
US20150015339A1 POWER AMPLIFIER ARCHITECTURES WITH INPUT POWER PROTECTION CIRCUITS 有权
具有输入电源保护电路的功率放大器结构

POWER AMPLIFIER ARCHITECTURES WITH INPUT POWER PROTECTION CIRCUITS
摘要:
An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.
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