POWER AMPLIFIER ARCHITECTURES WITH INPUT POWER PROTECTION CIRCUITS
    1.
    发明申请
    POWER AMPLIFIER ARCHITECTURES WITH INPUT POWER PROTECTION CIRCUITS 有权
    具有输入电源保护电路的功率放大器结构

    公开(公告)号:US20150015339A1

    公开(公告)日:2015-01-15

    申请号:US14327365

    申请日:2014-07-09

    Applicant: RFAXIS, INC.

    Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.

    Abstract translation: 公开了RF功率放大器电路和输入功率限制器电路。 功率检测器产生与输入信号的功率电平成比例的电压输出。 存在定向耦合器,其中第一端口连接到发射信号输入,连接到输入匹配网络的第二端口和连接到功率检测器的第三端口。 具有输入的第一功率放大器级连接到输入匹配网络,并且输出端连接到发射信号输出端。 连接到功率检测器的控制电路基于从功率检测器输出的电压与对应于输入信号的特定功率电平的预定电压电平的比较产生增益减小信号。 基于调整电路部件的配置的增益减小信号,RF功率放大器电路的总体增益被减小。

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