Invention Application
- Patent Title: RECEIVER WITH PIPELINED TAP COEFFICIENTS AND SHIFT CONTROL
- Patent Title (中): 接收器与管道系统系统和移位控制
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Application No.: US14146920Application Date: 2014-01-03
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Publication No.: US20150195108A1Publication Date: 2015-07-09
- Inventor: Tomasz Prokop , Volodmyr Shvydun , Viswanath Annampedu , Amaresh V. Malipatil
- Applicant: LSI Corporation
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H04L25/03
- IPC: H04L25/03 ; H03M9/00 ; G11C19/00

Abstract:
A serializer-deserializer using series-coupled signal processing blocks to process digitized input symbols, each block having a coefficient input. Each of plurality of series-coupled coefficient delay elements has a control input and a coefficient output coupling to the coefficient inputs of a corresponding one of the signal processing modules, is controlled by a shift register having an input and a plurality of outputs, each one of the plurality of outputs coupled to the control input of a corresponding one of the coefficient delay elements. An adaptation unit has a flag output coupled to the input of the shift register, and a first coefficient output coupled to the input of a first one of the coefficient delay elements. The adaptation unit generates a flag when the adaptation unit generates a coefficient, and the coefficient is entered into the first one of the coefficient delay elements when the shift register receives the flag.
Public/Granted literature
- US09294313B2 Receiver with pipelined tap coefficients and shift control Public/Granted day:2016-03-22
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