A method of manufacturing a semiconductor device obtained by laminating a first semiconductor chip and a second semiconductor chip with different planar sizes when seen in a plan view on a wiring board via an adhesive material, in which the second semiconductor chip with a relatively larger planar size is mounted on the first semiconductor chip with a relatively smaller planar size. Also, after the first and second semiconductor chips are mounted, the first and second semiconductor chips are sealed with resin. Here, before sealing with the resin, a gap between the second semiconductor chip and the wiring board is previously sealed with the adhesive material used when the first and second semiconductor chips are mounted.