Invention Application
- Patent Title: INTERFERENCE TESTING
- Patent Title (中): 干扰测试
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Application No.: US14229460Application Date: 2014-03-28
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Publication No.: US20150280781A1Publication Date: 2015-10-01
- Inventor: Alexey Kostinsky , Tomer Levy , Paul S. Cheses , Danny Naiger , Theodore Z. Schoenborn , Christopher P. Mozak , Nagi Aboulenien , James M. Shehadi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04B3/46
- IPC: H04B3/46

Abstract:
In one example a controller comprises logic, at least partially including hardware logic, configured to implement a first iteration of an interference test on a communication interconnect comprising a victim lane and a first aggressor lane by generating a first set of pseudo-random patterns on the victim lane and the aggressor lane using a first seed and implement a second iteration of an interference test by advancing the seed on the first aggressor lane. Other examples may be described.
Public/Granted literature
- US09722663B2 Interference testing Public/Granted day:2017-08-01
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