Invention Application
US20150340296A1 PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT TRANSISTOR DEVICE
审中-公开
平面计量垫附件一组熔点效应晶体管器件的FINS
- Patent Title: PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT TRANSISTOR DEVICE
- Patent Title (中): 平面计量垫附件一组熔点效应晶体管器件的FINS
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Application No.: US14816708Application Date: 2015-08-03
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Publication No.: US20150340296A1Publication Date: 2015-11-26
- Inventor: Sipeng Gu , Xiang Hu , Alok Vaid , Lokesh Subramany , Akshey Sehgal
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY GRAND CAYMAN
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY GRAND CAYMAN
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L27/088

Abstract:
Approaches for providing a substrate having a planar metrology pad adjacent a set of fins of a fin field effect transistor (FinFET) device are disclosed. Specifically, the FinFET device comprises a finned substrate, and a planar metrology pad formed on the substrate adjacent the fins in a metrology measurement area of the FinFET device. Processing steps include forming a first hardmask over the substrate, forming a photoresist over a portion of the first hardmask in the metrology measurement area of the FinFET device, removing the first hardmask in an area adjacent the metrology measurement area remaining exposed following formation of the photoresist, patterning a set of openings in the substrate to form the set of fins in the FinFET device in the area adjacent the metrology measurement area, depositing an oxide layer over the FinFET device, and planarizing the FinFET device to form the planar metrology pad in the metrology measurement area.
Public/Granted literature
- US10121711B2 Planar metrology pad adjacent a set of fins of a fin field effect transistor device Public/Granted day:2018-11-06
Information query
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