Invention Application
- Patent Title: SCHOTTKY GATED TRANSISTOR WITH INTERFACIAL LAYER
- Patent Title (中): 具有界面层的肖特基晶体管
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Application No.: US14731736Application Date: 2015-06-05
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Publication No.: US20150357457A1Publication Date: 2015-12-10
- Inventor: Andrew P. Ritenour
- Applicant: RF Micro Devices, Inc.
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/812 ; H01L29/49 ; H01L29/51 ; H01L29/20 ; H01L29/47

Abstract:
A Schottky gated transistor having reduced gate leakage current is disclosed. The Schottky gated transistor includes a substrate and a plurality of epitaxial layers disposed on the substrate. Further included is a gate contact having an interfacial layer disposed on a surface of the plurality of epitaxial layers and having a thickness that is between about 5 Angstroms (Å) and 40 Å. The interfacial layer can be made up of non-native materials in contrast to a native insulator such as silicon dioxide (SiO2) that is used as an insulating gate layer with silicon-based power transistors. The Schottky gated transistor further includes at least one metal layer disposed over the interfacial layer. A source contact and a drain contact are disposed on the surface of the plurality of epitaxial layers, wherein the source contact and the drain contact are spaced apart from the gate contact and each other.
Public/Granted literature
- US09455327B2 Schottky gated transistor with interfacial layer Public/Granted day:2016-09-27
Information query
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