Invention Application
US20150370705A1 ADDRESS SCHEDULING METHODS FOR NON-VOLATILE MEMORY DEVICES WITH THREE-DIMENSIONAL MEMORY CELL ARRAYS
审中-公开
具有三维存储器单元阵列的非易失性存储器件的地址调度方法
- Patent Title: ADDRESS SCHEDULING METHODS FOR NON-VOLATILE MEMORY DEVICES WITH THREE-DIMENSIONAL MEMORY CELL ARRAYS
- Patent Title (中): 具有三维存储器单元阵列的非易失性存储器件的地址调度方法
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Application No.: US14837857Application Date: 2015-08-27
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Publication No.: US20150370705A1Publication Date: 2015-12-24
- Inventor: Chi Weon YOON , Dong Hyuk CHAE , Sang-Wan NAM , Jung-Yun YUN
- Applicant: Chi Weon YOON , Dong Hyuk CHAE , Sang-Wan NAM , Jung-Yun YUN
- Priority: KR10-2010-0080964 20100820
- Main IPC: G06F12/06
- IPC: G06F12/06 ; G06F3/06

Abstract:
At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
Public/Granted literature
- US09798659B2 Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays Public/Granted day:2017-10-24
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