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    Nonvolatile memory device and storage device including nonvolatile memory device
    1.
    发明授权
    Nonvolatile memory device and storage device including nonvolatile memory device 有权

    公开(公告)号：US10658040B2

    公开(公告)日：2020-05-19

    申请号：US15351550

    申请日：2016-11-15

    申请人： Bongsoon Lim ,  Jung-Yun Yun ,  Ji-Suk Kim ,  Sang-Won Park

    发明人： Bongsoon Lim ,  Jung-Yun Yun ,  Ji-Suk Kim ,  Sang-Won Park

    IPC分类号： G11C16/10 ,  G11C16/34 ,  G11C16/26 ,  G11C16/08

    摘要： A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.

    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME
    2.
    发明申请
    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME 审中-公开
    非易失性存储器件，其操作方法和包括其的存储器系统

    公开(公告)号：US20150170749A1

    公开(公告)日：2015-06-18

    申请号：US14631341

    申请日：2015-02-25

    申请人： Sang-Won PARK ,  Dongku KANG ,  Jung-Yun YUN ,  Jinman HAN ,  ChiWeon YOON

    发明人： Sang-Won PARK ,  Dongku KANG ,  Jung-Yun YUN ,  Jinman HAN ,  ChiWeon YOON

    IPC分类号： G11C16/14 ,  G11C16/34 ,  G11C16/04

    CPC分类号： G11C16/14 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3445 ,  H01L27/11582

    摘要： The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells.

    摘要翻译： 本发明构思涉及非易失性存储器件及其操作方法。 非易失性存储器件包括在衬底上以行和列布置的多个串，每个串包括至少一个接地选择晶体管，多个存储器单元和顺序堆叠在衬底上的至少一个串选择晶体管。 该方法包括：擦除对应于擦除失败行的第一存储单元，并禁止对与擦除通过的行相对应的第二存储单元的擦除，并以相对于第一存储单元的每行为单位进行擦除验证。

    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE 有权
    三维半导体存储器件

    公开(公告)号：US20130051146A1

    公开(公告)日：2013-02-28

    申请号：US13584847

    申请日：2012-08-14

    申请人： JUNG-YUN YUN ,  JONG-YEOL PARK ,  CHI-WEON YOON ,  SUNG-WON YUN ,  SU-YONG KIM

    发明人： JUNG-YUN YUN ,  JONG-YEOL PARK ,  CHI-WEON YOON ,  SUNG-WON YUN ,  SU-YONG KIM

    IPC分类号： G11C16/26 ,  G11C16/04

    CPC分类号： H01L27/11582 ,  G11C16/0483

    摘要： A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation.

    摘要翻译： 三维（3D）半导体存储器件包括存储单元串，每个存储单元串包括至少一个选择晶体管和至少一个存储单元，共享第一阱区的第一级晶体管组，并且包括连接到选择的第一选择线传输晶体管 晶体管和连接到存储单元的第一世界线传输晶体管，第二传输晶体管组共享第二阱区并且包括连接到选择晶体管的第二选择线传输晶体管，以及控制器，其控制第一传输晶体管组和 二级晶体管组。 控制器在读取操作期间将选择的电压施加到第一和第二阱区。

    Nonvolatile memory devices, operating methods thereof and memory systems including the same
    4.
    发明授权
    Nonvolatile memory devices, operating methods thereof and memory systems including the same 有权
    非易失性存储器件，其操作方法和包括其的存储器系统

    公开(公告)号：US09324440B2

    公开(公告)日：2016-04-26

    申请号：US14631341

    申请日：2015-02-25

    申请人： Sang-Won Park ,  Dongku Kang ,  Jung-Yun Yun ,  Jinman Han ,  ChiWeon Yoon

    发明人： Sang-Won Park ,  Dongku Kang ,  Jung-Yun Yun ,  Jinman Han ,  ChiWeon Yoon

    IPC分类号： G11C16/16 ,  G11C16/14 ,  G11C16/04 ,  G11C16/34

    CPC分类号： G11C16/14 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3445 ,  H01L27/11582

    摘要： The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells.

    摘要翻译： 本发明构思涉及非易失性存储器件及其操作方法。 非易失性存储器件包括在衬底上以行和列布置的多个串，每个串包括至少一个接地选择晶体管，多个存储器单元和顺序堆叠在衬底上的至少一个串选择晶体管。 该方法包括：擦除对应于擦除失败行的第一存储单元，并禁止对与擦除通过的行相对应的第二存储单元的擦除，并以相对于第一存储单元的每行为单位进行擦除验证。

    Three dimensional semiconductor memory device
    6.
    发明授权
    Three dimensional semiconductor memory device 有权
    三维半导体存储器件

    公开(公告)号：US09030869B2

    公开(公告)日：2015-05-12

    申请号：US13584847

    申请日：2012-08-14

    申请人： Jung-Yun Yun ,  Jong-Yeol Park ,  Chi-Weon Yoon ,  Sung-Won Yun ,  Su-Yong Kim

    发明人： Jung-Yun Yun ,  Jong-Yeol Park ,  Chi-Weon Yoon ,  Sung-Won Yun ,  Su-Yong Kim

    IPC分类号： G11C11/34 ,  G11C7/22 ,  H01L27/115 ,  G11C16/04

    CPC分类号： H01L27/11582 ,  G11C16/0483

    摘要： A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation.

    摘要翻译： 三维（3D）半导体存储器件包括存储单元串，每个存储单元串包括至少一个选择晶体管和至少一个存储单元，共享第一阱区的第一级晶体管组，并且包括连接到选择的第一选择线传输晶体管 晶体管和连接到存储单元的第一世界线传输晶体管，第二传输晶体管组共享第二阱区并且包括连接到选择晶体管的第二选择线传输晶体管，以及控制器，其控制第一传输晶体管组和 二级晶体管组。 控制器在读取操作期间将选择的电压施加到第一和第二阱区。