A non-volatile memory device includes a memory cell array having a plurality of memory cells programmable into one of multiple logic states, the plurality of memory cells disposed at intersections of a plurality of wordlines and a plurality of bitlines, and a plurality of page buffers respectively connected to the plurality of bitlines and performing verifying read operations on the plurality of memory cells, The verifying read operations are performed on a first memory cell having a target state and a second memory cell having a lower state than the target state.