Invention Application
US20160055100A1 SYSTEM AND METHOD FOR REVERSE INCLUSION IN MULTILEVEL CACHE HIERARCHY 审中-公开
用于反向包含在多媒体高速缓存中的系统和方法

  • Patent Title: SYSTEM AND METHOD FOR REVERSE INCLUSION IN MULTILEVEL CACHE HIERARCHY
  • Patent Title (中): 用于反向包含在多媒体高速缓存中的系统和方法
  • Application No.: US14463647
    Application Date: 2014-08-19
  • Publication No.: US20160055100A1
    Publication Date: 2016-02-25
  • Inventor: Gabriel H. Loh
  • Applicant: Advanced Micro Devices, Inc.
  • Main IPC: G06F12/12
  • IPC: G06F12/12 G06F12/08
SYSTEM AND METHOD FOR REVERSE INCLUSION IN MULTILEVEL CACHE HIERARCHY
Abstract:
A processing system having multilevel cache employs techniques for identifying and selecting valid candidate cache lines for eviction from a lower level cache of an inclusive cache hierarchy, so as to reduce invalidations resulting from an eviction of a cache line in a lower level cache that also resides in a higher level cache. In response to an eviction trigger for a lower level cache, a cache controller identifies candidate cache lines for eviction from the cache lines residing in the lower level cache based on the replacement policy. The cache controller uses residency metadata to identify the candidate cache line as a valid candidate if it does not also reside in the higher cache and as an invalid candidate if it does reside in the higher cache. The cache controller prevents eviction of invalid candidates, so as to avoid unnecessary invalidations in the higher cache while maintaining inclusiveness.
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