Invention Application
- Patent Title: Enhanced Patterned Wafer Geometry Measurements Based Design Improvements for Optimal Integrated Chip Fabrication Performance
- Patent Title (中): 基于增强图案化晶圆几何测量的设计改进，优化集成芯片制造性能
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Application No.: US14520998Application Date: 2014-10-22
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Publication No.: US20160071260A1Publication Date: 2016-03-10
- Inventor: Amir Azordegan , Pradeep Vukkadala , Craig MacNaughton , Jaydeep Sinha
- Applicant: KLA-Tencor Corporation
- Main IPC: G06T7/00
- IPC: G06T7/00 ; G01N21/95 ; G06F17/50 ; G01B11/24
Abstract:
Methods and systems enabling ultra-high resolution topography measurements of patterned wafers are disclosed. Measurements obtained utilizing the ultra-high resolution metrology may be utilized to improve wafer metrology measurement accuracies. Additionally, measurements obtained utilizing the ultra-high resolution metrology may also be utilized to provide feedback and/or calibration control to improve fabrication and design of wafers.
Public/Granted literature
Information query
