-
1.发明申请Using Wafer Geometry to Improve Scanner Correction Effectiveness for Overlay Control 有权使用晶片几何来提高覆盖控制的扫描仪校正有效性公开(公告)号：US20150212429A1
公开(公告)日：2015-07-30
申请号：US14683880
申请日：2015-04-10
Applicant: KLA-Tencor Corporation
Inventor： Craig MacNaughton , Sathish Veeraraghavan , Pradeep Vukkadala , Jaydeep Sinha , Amir Azordegan
IPC: G03F7/20 , H01J37/317
CPC classification number: G03F7/70616 , G03F7/70633 , G03F7/70783 , G03F9/7003 , H01J37/28 , H01J37/304 , H01J37/3172 , H01J37/3174 , H01J2237/221 , H01J2237/2814 , H01J2237/30472 , H01J2237/30483 , H01J2237/31701
Abstract: Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
Abstract translation: 公开了用于提供改进的扫描仪校正的系统和方法。 根据本公开提供的扫描仪校正可以被称为晶片几何感知扫描仪校正。 更具体地，利用晶片几何形状和/或晶片形状签名信息来改进扫描器校正。 通过将晶片几何作为可能影响覆盖精度的错误源之一，可以获得更好的扫描仪校正，因为需要对一个较少的因素进行建模。
-
2.发明授权Enhanced patterned wafer geometry measurements based design improvements for optimal integrated chip fabrication performance 有权增强的图案化晶圆几何测量基于设计改进，以实现最佳集成芯片制造性能公开(公告)号：US09373165B2
公开(公告)日：2016-06-21
申请号：US14520998
申请日：2014-10-22
Applicant: KLA-Tencor Corporation
Inventor： Amir Azordegan , Pradeep Vukkadala , Craig MacNaughton , Jaydeep Sinha
CPC classification number: G01N21/9501 , G01B11/24 , G01N21/956 , G06T3/4069
Abstract: Methods and systems enabling ultra-high resolution topography measurements of patterned wafers are disclosed. Measurements obtained utilizing the ultra-high resolution metrology may be utilized to improve wafer metrology measurement accuracies. Additionally, measurements obtained utilizing the ultra-high resolution metrology may also be utilized to provide feedback and/or calibration control to improve fabrication and design of wafers.
Abstract translation: 公开了能够对图案化晶片进行超高分辨率地形测量的方法和系统。 可以利用超高分辨率测量获得的测量来提高晶片度量测量精度。 此外，利用超高分辨率度量获得的测量结果也可用于提供反馈和/或校准控制以改善晶片的制造和设计。
-
3.发明授权Using wafer geometry to improve scanner correction effectiveness for overlay control 有权使用晶圆几何来提高扫描仪校正功能，实现覆盖控制公开(公告)号：US09029810B2
公开(公告)日：2015-05-12
申请号：US14287746
申请日：2014-05-27
Applicant: KLA-Tencor Corporation
Inventor： Craig MacNaughton , Sathish Veeraraghavan , Pradeep Vukkadala , Jaydeep Sinha , Amir Azordegan
IPC: G03F7/20 , H01J37/317 , H01J37/28 , H01J37/304
CPC classification number: G03F7/70616 , G03F7/70633 , G03F7/70783 , G03F9/7003 , H01J37/28 , H01J37/304 , H01J37/3172 , H01J37/3174 , H01J2237/221 , H01J2237/2814 , H01J2237/30472 , H01J2237/30483 , H01J2237/31701
Abstract: Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
Abstract translation: 公开了用于提供改进的扫描仪校正的系统和方法。 根据本公开提供的扫描仪校正可以被称为晶片几何感知扫描仪校正。 更具体地，利用晶片几何形状和/或晶片形状签名信息来改进扫描器校正。 通过将晶片几何作为可能影响覆盖精度的错误源之一，可以获得更好的扫描仪校正，因为需要对一个较少的因素进行建模。
-
4.发明申请Using Wafer Geometry to Improve Scanner Correction Effectiveness for Overlay Control 有权使用晶片几何来提高覆盖控制的扫描仪校正有效性公开(公告)号：US20140353527A1
公开(公告)日：2014-12-04
申请号：US14287746
申请日：2014-05-27
Applicant: KLA-Tencor Corporation
Inventor： Craig MacNaughton , Sathish Veeraraghavan , Pradeep Vukkadala , Jaydeep Sinha , Amir Azordegan
IPC: G03F7/20 , H01J37/317
CPC classification number: G03F7/70616 , G03F7/70633 , G03F7/70783 , G03F9/7003 , H01J37/28 , H01J37/304 , H01J37/3172 , H01J37/3174 , H01J2237/221 , H01J2237/2814 , H01J2237/30472 , H01J2237/30483 , H01J2237/31701
Abstract: Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
Abstract translation: 公开了用于提供改进的扫描仪校正的系统和方法。 根据本公开提供的扫描仪校正可以被称为晶片几何感知扫描仪校正。 更具体地，利用晶片几何形状和/或晶片形状签名信息来改进扫描器校正。 通过将晶片几何作为可能影响覆盖精度的错误源之一，可以获得更好的扫描仪校正，因为需要对一个较少的因素进行建模。
-
公开(公告)号：US09518932B2
公开(公告)日：2016-12-13
申请号：US14517751
申请日：2014-10-17
Applicant: KLA-Tencor Corporation
Inventor： Allen Park , Craig MacNaughton , Ellis Chang
CPC classification number: G01N21/93 , G01B11/06 , G01B11/0675 , G01B2210/56 , G01N21/9501 , G01N21/956 , G01N2201/061 , G01N2201/105 , G01N2201/11 , G01N2201/125 , G03F7/705 , G03F7/70616
Abstract: Methods and systems for determining one or more parameters of a wafer inspection process are provided. One method includes acquiring metrology data for a wafer generated by a wafer metrology system. The method also includes determining one or more parameters of a wafer inspection process for the wafer or another wafer based on the metrology data.
Abstract translation: 提供了用于确定晶片检查过程的一个或多个参数的方法和系统。 一种方法包括获取由晶片计量系统产生的晶片的度量数据。 该方法还包括基于测量数据确定晶片或另一晶片的晶片检查过程的一个或多个参数。
-
Patent Agency Ranking
公开(公告)号：US09513565B2
公开(公告)日：2016-12-06
申请号：US14683880
申请日：2015-04-10
Applicant: KLA-Tencor Corporation
Inventor： Craig MacNaughton , Sathish Veeraraghavan , Pradeep Vukkadala , Jaydeep Sinha , Amir Azordegan
IPC: H01L21/66 , G01B9/02 , G03F7/20 , H01J37/317 , H01J37/28 , H01J37/304
CPC classification number: G03F7/70616 , G03F7/70633 , G03F7/70783 , G03F9/7003 , H01J37/28 , H01J37/304 , H01J37/3172 , H01J37/3174 , H01J2237/221 , H01J2237/2814 , H01J2237/30472 , H01J2237/30483 , H01J2237/31701
Abstract: Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
-
公开(公告)号：US20150124247A1
公开(公告)日：2015-05-07
申请号：US14517751
申请日：2014-10-17
Applicant: KLA-Tencor Corporation
Inventor： Allen Park , Craig MacNaughton , Ellis Chang
CPC classification number: G01N21/93 , G01B11/06 , G01B11/0675 , G01B2210/56 , G01N21/9501 , G01N21/956 , G01N2201/061 , G01N2201/105 , G01N2201/11 , G01N2201/125 , G03F7/705 , G03F7/70616
Abstract: Methods and systems for determining one or more parameters of a wafer inspection process are provided. One method includes acquiring metrology data for a wafer generated by a wafer metrology system. The method also includes determining one or more parameters of a wafer inspection process for the wafer or another wafer based on the metrology data.
Abstract translation: 提供了用于确定晶片检查过程的一个或多个参数的方法和系统。 一种方法包括获取由晶片计量系统产生的晶片的度量数据。 该方法还包括基于测量数据确定晶片或另一晶片的晶片检查过程的一个或多个参数。
-
公开(公告)号：US10545412B2
公开(公告)日：2020-01-28
申请号：US15123980
申请日：2015-03-05
Applicant: KLA-Tencor Corporation
Inventor： Wei Chang , Krishna Rao , Joseph Gutierrez , Ramon Olavarria , Craig MacNaughton , Amir Azordegan , Prasanna Dighe
Abstract: A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
-
9.发明申请Statistical Overlay Error Prediction for Feed Forward and Feedback Correction of Overlay Errors, Root Cause Analysis and Process Control 审中-公开统计叠加误差预测的前馈和反馈校正重叠错误，根本原因分析和过程控制公开(公告)号：US20170017162A1
公开(公告)日：2017-01-19
申请号：US15123980
申请日：2015-03-05
Applicant: KLA-Tencor Corporation
Inventor： Wei Chang , Krishna Rao , Joseph Gutierrez , Ramon Olavarria , Craig MacNaughton , Amir Azordegan , Prasanna Dighe
CPC classification number: G03F7/705 , G03F1/144 , G03F1/36 , G03F7/70633 , G06F17/5068 , G06F17/5081 , G06F2217/12 , G06N5/04 , G06N20/00 , Y02P90/265
Abstract: A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
Abstract translation: 收集数据和训练，验证和部署统计模型以使用图案化晶片几何数据和其他相关信息来预测覆盖误差的方法包括选择训练晶片组，在多个光刻步骤测量并计算几何差异，将多个预测模型应用于 训练晶片几何差异并将预测覆盖与训练晶片组上测量的覆盖层进行比较。 识别最准确的预测模型，并将结果反馈到光刻扫描仪工具，可以校正这些影响并减少晶片扫描和曝光过程中的重叠误差。
-
10.发明申请Enhanced Patterned Wafer Geometry Measurements Based Design Improvements for Optimal Integrated Chip Fabrication Performance 有权基于增强图案化晶圆几何测量的设计改进，优化集成芯片制造性能公开(公告)号：US20160071260A1
公开(公告)日：2016-03-10
申请号：US14520998
申请日：2014-10-22
Applicant: KLA-Tencor Corporation
Inventor： Amir Azordegan , Pradeep Vukkadala , Craig MacNaughton , Jaydeep Sinha
CPC classification number: G01N21/9501 , G01B11/24 , G01N21/956 , G06T3/4069
Abstract: Methods and systems enabling ultra-high resolution topography measurements of patterned wafers are disclosed. Measurements obtained utilizing the ultra-high resolution metrology may be utilized to improve wafer metrology measurement accuracies. Additionally, measurements obtained utilizing the ultra-high resolution metrology may also be utilized to provide feedback and/or calibration control to improve fabrication and design of wafers.
Abstract translation: 公开了能够对图案化晶片进行超高分辨率地形测量的方法和系统。 可以利用超高分辨率测量获得的测量来提高晶片度量测量精度。 此外，利用超高分辨率度量获得的测量结果也可用于提供反馈和/或校准控制以改善晶片的制造和设计。
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.017 seconds)
