Invention Application
- Patent Title: METHOD FOR FORMING THROUGH SUBSTRATE VIAS WITH TETHERS
- Patent Title (中): 通过具有四面体的基板VIAS形成的方法
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Application No.: US14619068Application Date: 2015-02-11
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Publication No.: US20160093531A1Publication Date: 2016-03-31
- Inventor: John C HARLEY , Zhimin J. Yao
- Applicant: Innovative Micro Technology
- Assignee: Innovative Micro Technology
- Current Assignee: Innovative Micro Technology
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/321 ; H01L21/288 ; H01L21/02 ; H01L21/84 ; B81C1/00

Abstract:
A method for forming through silicon vias (TSVs) in a silicon substrate is disclosed. The method involves forming a silicon post as an substantially continuous annulus in a first side of a silicon substrate, removing material from an opposite side to the level of the substantially continuous annulus, removing the silicon post and replacing it with a metal material to form a metal via extending through the thickness of the substrate. The substantially continuous annulus may be interrupted by at least one tether which connects the silicon post to the silicon substrate. The tether may be formed of a thing isthmus of silicon, or some suitable insulating material.
Public/Granted literature
- US09324613B2 Method for forming through substrate vias with tethers Public/Granted day:2016-04-26
Information query
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