Invention Application
US20160111426A1 METHODS OF INTEGRATING MULTIPLE GATE DIELECTRIC TRANSISTORS ON A TRI-GATE (FINFET) PROCESS
审中-公开
在三极（FINFET）工艺上集成多个栅极介质晶体管的方法
- Patent Title: METHODS OF INTEGRATING MULTIPLE GATE DIELECTRIC TRANSISTORS ON A TRI-GATE (FINFET) PROCESS
- Patent Title (中): 在三极（FINFET）工艺上集成多个栅极介质晶体管的方法
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Application No.: US14977367Application Date: 2015-12-21
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Publication No.: US20160111426A1Publication Date: 2016-04-21
- Inventor: Curtis TSAI , Chia-Hong JAN , Jeng-Ya David YEH , Joodong PARK , Walid M. HAFEZ
- Applicant: Intel Corporation
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/49 ; H01L29/423
Abstract:
Two or more types of fin-based transistors having different gate structures and formed on a single integrated circuit are described. The gate structures for each type of transistor are distinguished at least by the thickness or composition of the gate dielectric layer(s) or the composition of the work function metal layer(s) in the gate electrode. Methods are also provided for fabricating an integrated circuit having at least two different types of fin-based transistors, where the transistor types are distinguished by the thickness and composition of the gate dielectric layer(s) and/or the thickness and composition of the work function metal in the gate electrode.
Public/Granted literature
- US10096599B2 Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) process Public/Granted day:2018-10-09
Information query
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