Invention Application
- Patent Title: Method for Fabricating CMOS Compatible Contact Layers in Semiconductor Devices
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Application No.: US14989114Application Date: 2016-01-06
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Publication No.: US20160118542A1Publication Date: 2016-04-28
- Inventor: Celso Cavaco , Brice De Jaeger , Marleen Van Hove , Vasyl Motsnyi
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Priority: EP13195799.5 20131205
- Main IPC: H01L33/40
- IPC: H01L33/40 ; H01L29/207 ; H01L33/32 ; H01L21/3213 ; H01L29/45 ; H01L29/20 ; H01L21/324

Abstract:
A method for fabricating Complementary Metal Oxide Semiconductor (CMOS) compatible contact layers in semiconductor devices is disclosed. In one embodiment, a nickel (Ni) layer is deposited on a p-type gallium nitride (GaN) layer of a GaN based structure. Further, the GaN based structure is thermally treated at a temperature range of 350° C. to 500° C. Furthermore, the Ni layer is removed using an etchant. Additionally, a CMOS compatible contact layer is deposited on the p-type GaN layer, upon removal of the Ni layer.
Public/Granted literature
- US09698309B2 Method for fabricating CMOS compatible contact layers in semiconductor devices Public/Granted day:2017-07-04
Information query
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