Invention Application
US20160172338A1 SILICON PACKAGE FOR EMBEDDED ELECTRONIC SYSTEM HAVING STACKED SEMICONDUCTOR CHIPS
审中-公开
具有堆叠半导体芯片的嵌入式电子系统的硅胶包装
- Patent Title: SILICON PACKAGE FOR EMBEDDED ELECTRONIC SYSTEM HAVING STACKED SEMICONDUCTOR CHIPS
- Patent Title (中): 具有堆叠半导体芯片的嵌入式电子系统的硅胶包装
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Application No.: US15053089Application Date: 2016-02-25
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Publication No.: US20160172338A1Publication Date: 2016-06-16
- Inventor: Osvaldo Jorge Lopez , Jonathan Almeria Noquil , Thomas Eugene Grebs , Simon John Molloy
- Applicant: Texas Instruments Incorporated
- Main IPC: H01L25/065
- IPC: H01L25/065

Abstract:
An electronic system comprises a first chip of single-crystalline semiconductor shaped as a hexahedron and including a first electronic device embedded in a second chip of single-crystalline semiconductor shaped as a container having a slab bordered by retaining walls, and including a second electronic device. The container shaped as a slab bordered by the retaining walls and including conductive traces and terminals. The first chip is attached to the slab of second chip, forming nested chips. The first and second chips embedded in the container. The nested first and second chips are operable as an electronic system and the container is operable as the package of the system.
Public/Granted literature
- US10109614B2 Silicon package for embedded electronic system having stacked semiconductor chips Public/Granted day:2018-10-23
Information query
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