Invention Application
US20160259398A1 SYSTEMS AND METHODS FOR IMPLEMENTING POWER COLLAPSE IN A MEMORY
审中-公开
在存储器中实现功率收敛的系统和方法
- Patent Title: SYSTEMS AND METHODS FOR IMPLEMENTING POWER COLLAPSE IN A MEMORY
- Patent Title (中): 在存储器中实现功率收敛的系统和方法
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Application No.: US14638185Application Date: 2015-03-04
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Publication No.: US20160259398A1Publication Date: 2016-09-08
- Inventor: Adam Edward NEWHAM , Kenneth David EASTON , Rashid Ahmed Akbar ATTAR
- Applicant: QUALCOMM Incorporated
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F12/02

Abstract:
A power management system for stack memory thread tasks according to some examples of the disclosure may include a non-collapsible memory region, a collapsible memory region configured below the non-collapsible memory region, a memory management unit in communication with the non-collapsible memory region and the collapsible memory region, the memory management unit operable to allocate a portion of the non-collapsible memory region and a portion of the collapsible memory region to a thread task upon initialization of the thread task and power down the portion of the collapsible memory region allocated to the thread task upon receiving a power down command.
Public/Granted literature
- US10303235B2 Systems and methods for implementing power collapse in a memory Public/Granted day:2019-05-28
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