Invention Application
- Patent Title: SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Patent Title (中): 半导体器件及其制造方法
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Application No.: US15079338Application Date: 2016-03-24
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Publication No.: US20160336443A1Publication Date: 2016-11-17
- Inventor: Wataru Sumida , Akihiro Shimomura
- Applicant: Renesas Electronics Corporation
- Priority: JP2015-099984 20150515
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/423 ; H01L29/08 ; H01L29/66

Abstract:
In a vertical MOSFET in which bottom portions of each gate electrode formed in a ditch are extended toward the drain region, the on resistance is reduced while preventing voltage resistance reduction and switching speed reduction caused by a capacitance increase between the gate and drain. A vertical MOSFET includes first ditches, second ditches, and gate electrodes. The first ditches are formed in an upper surface portion of an epitaxial layer formed over a semiconductor substrate and extend in a second direction extending along a main surface of the semiconductor substrate. The second ditches are formed in bottom surface portions of each of the first ditches and are arranged in the second direction. The gate electrodes are formed in the first ditches and second ditches. The gate electrodes formed in the first ditches include lower electrodes arranged in the second direction.
Public/Granted literature
- US09837492B2 Semiconductor device and method for manufacturing the same Public/Granted day:2017-12-05
Information query
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