Invention Application
US20160351495A1 PROCESS FOR MANUFACTURING INTEGRATED ELECTRONIC DEVICES, IN PARTICULAR CMOS DEVICES USING A BORDERLESS CONTACT TECHNIQUE
审中-公开
使用无边界接触技术制造集成电子器件的特殊CMOS器件的工艺
- Patent Title: PROCESS FOR MANUFACTURING INTEGRATED ELECTRONIC DEVICES, IN PARTICULAR CMOS DEVICES USING A BORDERLESS CONTACT TECHNIQUE
- Patent Title (中): 使用无边界接触技术制造集成电子器件的特殊CMOS器件的工艺
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Application No.: US14966435Application Date: 2015-12-11
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Publication No.: US20160351495A1Publication Date: 2016-12-01
- Inventor: Sara PAOLILLO , Giovanni TAGLIABUE , Simone Dario MARIANI
- Applicant: STMICROELECTRONICS S.R.L.
- Priority: IT102015000019455 20150529
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L27/092 ; H01L21/8238 ; H01L21/768 ; H01L23/532
Abstract:
For manufacturing an integrated electronic device, a protection layer, of a first material, is formed over a body having a non-planar surface; a first dielectric layer, of a second material, is formed over the protection layer, the second material being selectively etchable with respect to the first material; an intermediate layer, of a third material, is formed over the first dielectric layer, the third material being selectively etchable with respect to the second material; a second dielectric layer, of a fourth material, is formed over the intermediate layer, the fourth material being selectively etchable with respect to the third material; vias are formed through the second dielectric layer, the intermediate layer, the first dielectric layer, and the protection layer; and electrical contacts, of conductive material, are formed in the vias.
Information query
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