公开(公告)号：US20160351495A1

公开(公告)日：2016-12-01

申请号：US14966435

申请日：2015-12-11

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Sara PAOLILLO ,  Giovanni TAGLIABUE ,  Simone Dario MARIANI

IPC: H01L23/522 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76819 ,  H01L21/76829 ,  H01L21/76877 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53295 ,  H01L27/092

Abstract: For manufacturing an integrated electronic device, a protection layer, of a first material, is formed over a body having a non-planar surface; a first dielectric layer, of a second material, is formed over the protection layer, the second material being selectively etchable with respect to the first material; an intermediate layer, of a third material, is formed over the first dielectric layer, the third material being selectively etchable with respect to the second material; a second dielectric layer, of a fourth material, is formed over the intermediate layer, the fourth material being selectively etchable with respect to the third material; vias are formed through the second dielectric layer, the intermediate layer, the first dielectric layer, and the protection layer; and electrical contacts, of conductive material, are formed in the vias.

Abstract translation: 为了制造集成电子器件，在具有非平面表面的主体上形成第一材料的保护层; 第二材料的第一介电层形成在保护层上方，第二材料相对于第一材料可选择性地蚀刻; 第三材料的中间层形成在第一介电层上，第三材料相对于第二材料可选择性地蚀刻; 第四材料的第二介电层形成在所述中间层上，所述第四材料相对于所述第三材料可选择性地蚀刻; 通过第二介电层，中间层，第一介电层和保护层形成通孔; 并且导电材料的电触点形成在通孔中。