Invention Application
US20160351509A1 WAFER LEVEL FAN-OUT WITH ELECTROMAGNETIC SHIELDING 有权
带电磁屏蔽的电平降低

WAFER LEVEL FAN-OUT WITH ELECTROMAGNETIC SHIELDING
Abstract:
The present disclosure integrates electromagnetic shielding into a wafer level fan-out packaging process. First, a mold wafer having multiple modules is provided. Each module includes a die with an I/O port and is surrounded by an inter-module area. A redistribution structure that includes a shield connected element coupled to the I/O port of each module is formed over a bottom surface of the mold wafer. The shield connected element extends laterally from the I/O port into the inter-module area for each module. Next, the mold wafer is sub-diced at each inter-module area to create a cavity. A portion of the shield connected element is then exposed through the bottom of each cavity. A shielding structure is formed over a top surface of the mold wafer and exposed faces of each cavity. The shielding structure is in contact with the shield connected element.
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