Invention Application
US20170032969A1 SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNELS AND METHOD OF MANUFACTURING THE SAME 审中-公开
具有垂直通道的半导体器件及其制造方法

SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNELS AND METHOD OF MANUFACTURING THE SAME
Abstract:
A method of manufacturing a semiconductor device which can prevent leakage current caused by gate electrodes intersecting element isolation layers in a major axis of an active region, and which further has vertical channels to provide a sufficient overlap margin, and a semiconductor device manufactured using the above method. The device includes gate electrodes formed on element isolation layers that are disposed between active regions and have top surfaces that are higher than the top surfaces of the active regions. Since the gate electrodes are formed on the element isolation layers, leakage current in a semiconductor substrate is prevented. In addition, the gate electrodes are formed using a striped shape mask pattern, thereby obtaining a sufficient overlap margin compared to a contact shape or bar shape pattern.
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