Invention Application
US20170054003A1 Confined Epitaxial Regions for Semiconductor Devices and Methods of Fabricating Semiconductor Devices Having Confined Epitaxial Regions
审中-公开
用于半导体器件的封闭外延区域和制造具有限定外延区域的半导体器件的方法
- Patent Title: Confined Epitaxial Regions for Semiconductor Devices and Methods of Fabricating Semiconductor Devices Having Confined Epitaxial Regions
- Patent Title (中): 用于半导体器件的封闭外延区域和制造具有限定外延区域的半导体器件的方法
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Application No.: US15119370Application Date: 2014-03-27
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Publication No.: US20170054003A1Publication Date: 2017-02-23
- Inventor: Szuya S. LIAO , Michael L. HATTENDORF , Tahir GHANI
- Applicant: Intel Corporation
- International Application: PCT/US2014/032072 WO 20140327
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L29/08 ; H01L29/78

Abstract:
Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions are described. For example, a semiconductor structure includes a plurality of parallel semiconductor fins disposed above and continuous with a semiconductor substrate. An isolation structure is disposed above the semiconductor substrate and adjacent to lower portions of each of the plurality of parallel semiconductor fins. An upper portion of each of the plurality of parallel semiconductor fins protrudes above an uppermost surface of the isolation structure. Epitaxial source and drain regions are disposed in each of the plurality of parallel semiconductor fins adjacent to a channel region in the upper portion of the semiconductor fin. The epitaxial source and drain regions do not extend laterally over the isolation structure. The semiconductor structure also includes one or more gate electrodes, each gate electrode disposed over the channel region of one or more of the plurality of parallel semiconductor fins.
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