Invention Application
- Patent Title: POWER MULTIPLEXER FOR INTEGRATED CIRCUIT POWER GRID EFFICIENCY
- Patent Title (中): 集成电路功率多路复用器功率因数
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Application No.: US14836694Application Date: 2015-08-26
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Publication No.: US20170060224A1Publication Date: 2017-03-02
- Inventor: Lipeng Cao , Tauseef Kazi , Alain Dominique Artieri
- Applicant: QUALCOMM Incorporated
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/26
Abstract:
An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.
Public/Granted literature
- US09690359B2 Power multiplexer for integrated circuit power grid efficiency Public/Granted day:2017-06-27
Information query
