发明申请
- 专利标题： POWER MULTIPLEXER FOR INTEGRATED CIRCUIT POWER GRID EFFICIENCY
- 专利标题（中）： 集成电路功率多路复用器功率因数
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申请号： US14836694申请日： 2015-08-26
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公开(公告)号： US20170060224A1公开(公告)日： 2017-03-02
- 发明人: Lipeng Cao , Tauseef Kazi , Alain Dominique Artieri
- 申请人： QUALCOMM Incorporated
- 主分类号： G06F1/32
- IPC分类号： G06F1/32 ; G06F1/26
摘要：
An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.
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