Invention Application
US20170066648A1 CMOS-MEMS INTEGRATED DEVICE WITH SELECTIVE BOND PAD PROTECTION 审中-公开
具有选择性焊盘保护的CMOS-MEMS集成器件

  • Patent Title: CMOS-MEMS INTEGRATED DEVICE WITH SELECTIVE BOND PAD PROTECTION
  • Patent Title (中): 具有选择性焊盘保护的CMOS-MEMS集成器件
  • Application No.: US15356916
    Application Date: 2016-11-21
  • Publication No.: US20170066648A1
    Publication Date: 2017-03-09
  • Inventor: Daesung LEE
  • Applicant: INVENSENSE, INC.
  • Main IPC: B81C1/00
  • IPC: B81C1/00 B81B7/00
CMOS-MEMS INTEGRATED DEVICE WITH SELECTIVE BOND PAD PROTECTION
Abstract:
A method and system for preparing a semiconductor wafer are disclosed. In a first aspect, the method comprises providing a passivation layer over a patterned top metal on the semiconductor wafer, etching the passivation layer to open a bond pad in the semiconductor wafer using a first mask, depositing a protection layer on the semiconductor wafer, patterning the protective layer using a second mask, and etching the passivation layer to open other electrodes in the semiconductor wafer using a third mask. The system comprises a MEMS device that further comprises a first substrate and a second substrate bonded to the first substrate, wherein the second substrate is prepared by the aforementioned steps of the method.
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