A semiconductor device includes a first set of pads disposed at a first vertical level on a substrate, a first interconnection layer formed at a second vertical level higher than the first vertical level on the substrate, a second interconnection layer formed at a third vertical level higher than the second vertical level on the substrate, capacitive elements included in either the first or the second interconnection layer, and a second set of pads disposed at a fourth vertical level higher than the third vertical level on the substrate. A first capacitive element of the capacitive elements is connected between a first portion and a second portion of the first interconnection layer or a first capacitive element of the capacitive elements is connected between a third portion and a fourth portion of the second interconnection layer.