公开(公告)号：US20170069582A1

公开(公告)日：2017-03-09

申请号：US15172917

申请日：2016-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Il-Joon KIM ,  SunWon KANG

IPC: H01L23/64 ,  H01L27/108 ,  H01L23/00 ,  H01L25/065 ,  H01L23/522 ,  H01L23/498

CPC classification number: H01L23/642 ,  H01L23/49811 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5226 ,  H01L24/02 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49113 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A semiconductor device includes a first set of pads disposed at a first vertical level on a substrate, a first interconnection layer formed at a second vertical level higher than the first vertical level on the substrate, a second interconnection layer formed at a third vertical level higher than the second vertical level on the substrate, capacitive elements included in either the first or the second interconnection layer, and a second set of pads disposed at a fourth vertical level higher than the third vertical level on the substrate. A first capacitive element of the capacitive elements is connected between a first portion and a second portion of the first interconnection layer or a first capacitive element of the capacitive elements is connected between a third portion and a fourth portion of the second interconnection layer.

Abstract translation: 一种半导体器件包括：设置在衬底上的第一垂直电平的第一组焊盘;在第二垂直电平上形成的第一互连层，该第二垂直电平高于衬底上的第一垂直电平;第二互连层， 包括在第一或第二互连层中的电容元件，以及设置在高于衬底上的第三垂直电平的第四垂直电平的第二组焊盘。 电容元件的第一电容元件连接在第一互连层的第一部分和第二部分之间，或者电容元件的第一电容元件连接在第二互连层的第三部分和第四部分之间。