Invention Application
- Patent Title: MANAGING POWER-DOWN MODES
- Patent Title (中): 管理掉电模式
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Application No.: US15010237Application Date: 2016-01-29
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Publication No.: US20170075408A1Publication Date: 2017-03-16
- Inventor: Sarbartha BANERJEE , Rakesh MISRA
- Applicant: QUALCOMM Incorporated
- Priority: IN4955/CHE/2015 20150916
- Main IPC: G06F1/32
- IPC: G06F1/32

Abstract:
An apparatus includes a first circuit configured to receive one or more requests from a plurality of cores. Each of the one or more requests is to enter or to exit one of a plurality of power-down modes. The first circuit further selects one or more of the cores to enter or to exit the requested power-down mode or modes based on inrush current information associated with the power-down modes. A second circuit is configured to effect entering or exiting the requested power-down mode or modes in the selected one or more of the cores.
Public/Granted literature
- US09886081B2 Managing power-down modes Public/Granted day:2018-02-06
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