Invention Application
- Patent Title: MEMORY DEVICE AND FABRICATION METHOD OF THE SAME
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Application No.: US15186446Application Date: 2016-06-18
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Publication No.: US20170110461A1Publication Date: 2017-04-20
- Inventor: Hidehiro FUJIWARA , Wei-Min CHAN , Chih-Yu LIN , Yen-Huei CHEN , Hung-Jen LIAO
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW HSINCHU
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW HSINCHU
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L21/768 ; H01L21/321 ; H01L23/528

Abstract:
A device is disclosed that includes a memory bit cell, a first word line, a pair of metal islands and a pair of connection metal lines. The first word line is disposed in a first metal layer and is electrically coupled to the memory bit cell. The pair of metal islands are disposed in the first metal layer at opposite sides of the word line and are electrically coupled to a power supply. The pair of connection metal lines are disposed in a second metal layer and are configured to electrically couple the metal islands to the memory bit cell respectively.
Public/Granted literature
- US10411019B2 SRAM cell word line structure with reduced RC effects Public/Granted day:2019-09-10
Information query
IPC分类: