Invention Application
- Patent Title: DIFFERENTIAL ETCH OF METAL OXIDE BLOCKING DIELECTRIC LAYER FOR THREE-DIMENSIONAL MEMORY DEVICES
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Application No.: US15440365Application Date: 2017-02-23
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Publication No.: US20170162597A1Publication Date: 2017-06-08
- Inventor: Rahul Sharangpani , Sateesh Koka , Raghuveer S. Makala , Srikanth Ranganathan , Mark Juanitas , Johann Alsmeier
- Applicant: SANDISK TECHNOLOGIES LLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11573 ; H01L23/528 ; H01L27/11556 ; H01L27/11529 ; H01L23/522 ; H01L27/1157 ; H01L27/11524
Abstract:
A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion.
Public/Granted literature
- US09842857B2 Differential etch of metal oxide blocking dielectric layer for three-dimensional memory devices Public/Granted day:2017-12-12
Information query
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