Apparatus and methods implementing a Remote Snoop Filter (“RSF”) for reducing unnecessary snoops to one or more Field Programmable Gate Arrays (“FPGAs”) in a hardware system by tracking the address and state of each cache line cached in the FPGA's cache. The apparatus include one or more processors, one or more FPGAs, and a system memory. Each processor further comprises a Caching and Home Agent (“CHA”), an L3 or Last Level Cache (“LLC”), and one or more cores wherein each core contains a core cache. The CHA implements and manages an RSF which tracks the address and state of each cache line stored in the one or more FPGAs. The hit/miss result from an RSF lookup is used by the CHA to determine whether or not to filter snoops to the FPGAs. A cache line miss in the RSF indicates that the requested cache line is not in any of the FPGAs and thus no snoop to the FPGA should be issued. This ensures that the FPGAs are generally not snooped unless necessary.