Invention Application
- Patent Title: Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
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Application No.: US14997774Application Date: 2016-01-18
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Publication No.: US20170194281A1Publication Date: 2017-07-06
- Inventor: Javier A. DeLaCruz , Abiola Awujoola , Ashok S. Prabhu , Christopher W. Lattin , Zhuowen Sun
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporatoin
- Current Assignee: Invensas Corporatoin
- Current Assignee Address: US CA San Jose
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L25/065 ; H01L23/31 ; H01L25/16

Abstract:
In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
Public/Granted literature
Information query
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