Invention Application
- Patent Title: METHOD OF FABRICATING TANTALUM NITRIDE BARRIER LAYER AND SEMICONDUCTOR DEVICE THEREOF
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Application No.: US15074991Application Date: 2016-03-18
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Publication No.: US20170207316A1Publication Date: 2017-07-20
- Inventor: Chi-Cheng HUNG , Yu-Sheng WANG , Weng-Cheng CHEN , Hao-Han WEI , Ming-Ching CHUNG , Chi-Cherng JENG
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L21/285 ; H01L29/78 ; H01L29/40

Abstract:
A method of fabricating tantalum nitride barrier layer in an ultra low threshold voltage semiconductor device is provided. The method includes forming a high-k dielectric layer over a semiconductor substrate. Subsequently, a tantalum nitride barrier layer is formed on the high-k dielectric layer. The tantalum nitride barrier layer has a Ta:N ratio between 1.2 and 3. Next, a plurality of first metal gates is formed on the tantalum nitride barrier layer. The first metal gates are patterned, and then a second metal gate is formed on the tantalum nitride barrier layer.
Public/Granted literature
- US10147799B2 Method of fabricating tantalum nitride barrier layer and semiconductor device thereof Public/Granted day:2018-12-04
Information query
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