- 专利标题: TRANSISTOR STRUCTURE WITH VARIED GATE CROSS-SECTIONAL AREA
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申请号: US15073740申请日: 2016-03-18
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公开(公告)号: US20170271483A1公开(公告)日: 2017-09-21
- 发明人: Dominic J. Schepis , Alexander Reznicek , Pranita Kerber , Qiqing C. Ouyang
- 申请人: GLOBALFOUNDRIES INC.
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L29/423 ; H01L21/768 ; H01L21/306 ; H01L21/324 ; H01L29/78 ; H01L21/321
摘要:
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present disclosure can include, e.g., forming a structure including: a semiconductor fin positioned on a substrate, wherein the semiconductor fin includes: a gate area, and a terminal area laterally distal to the gate area, a sacrificial gate positioned on the gate area of the semiconductor fin, and an insulator positioned on the terminal area of the semiconductor fin; removing the sacrificial gate to expose the gate area of the semiconductor fin; increasing or reducing a cross-sectional area of the gate area of the semiconductor fin; and forming a transistor gate on the gate area of the semiconductor fin.
公开/授权文献
- US09966457B2 Transistor structure with varied gate cross-sectional area 公开/授权日:2018-05-08
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