- 专利标题: INTEGRATED CIRCUIT FILLER AND METHOD THEREOF
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申请号: US15484628申请日: 2017-04-11
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公开(公告)号: US20180006010A1公开(公告)日: 2018-01-04
- 发明人: Tseng Chin LO , Molly Chang , Ya-Wen TSENG , Chih-Ting SUN , Zi-Kuan LI , Bo-Sen CHANG , Geng-He LIN
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号: H01L27/02
- IPC分类号: H01L27/02 ; H01L21/8234 ; G06F17/50 ; H01L21/027 ; H01L27/11 ; H01L21/66
摘要:
Provided is a method for inserting a pre-designed filler cell, as a replacement to a standard filler cell, including identifying at least one gap among a plurality of functional cells. In some embodiments, a pre-designed filler cell is inserted within the at least one gap. By way of example, the pre-designed filler cell includes a layout design having a pattern associated with a particular failure mode. In various embodiments, a layer is patterned on a semiconductor substrate such that the pattern of the layout design is transferred to the layer on the semiconductor substrate. Thereafter, the patterned layer is inspected using an electron beam (e-beam) inspection process.
公开/授权文献
- US10283496B2 Integrated circuit filler and method thereof 公开/授权日:2019-05-07
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